Gen Tb
Generate a complete UVM testbench scaffold for a single IP from its spec documents (docx/pdf/md) and register table (xlsx/csv/md/IP-XACT). Use whenever the user asks to "generate a UVM tb", "build a verification environment", "scaffold a testbench", "create a UVC", "set up DV for this IP", or anything equivalent in Chinese ("帮我生成验证环境", "搭一个 tb", "做 UVM 环境", "做这个 IP 的验证"). Also trigger when the user points at a directory containing an IP spec and asks Claude to "verify it" / "test it" without naming UVM explicitly. Produces a runnable UVM tb (APB / AHB-Lite / AXI4-Lite as first-class buses; oth
Install
npx skills add gokeshenzhen/gen-tb-skill --skill gen-tbgit clone --depth 1 https://github.com/gokeshenzhen/gen-tb-skill.git /tmp/gen-tb-skill
mkdir -p ~/.claude/skills
cp -r /tmp/gen-tb-skill/. ~/.claude/skills/gen-tbPersonal skills live in ~/.claude/skills. Use .claude/skills in a project folder to share a skill with your team.
From the SKILL.md
# gen-tb — UVM Testbench Scaffold Generator ## Purpose Generate a directory-aligned UVM testbench for one IP from: Built-in first-class buses: APB slave, AHB-Lite (slave or master), AXI4-Lite (slave or master). Other single-channel request/response buses (I2C, SPI, Wishbone, OBI, custom register buses, …) are handled by a generic fallback that reuses the same layout, sim flow, and `tb_api` surface — see §Scope below. Inputs: - behavioral spec: `*.docx`, `*.pdf`, `*.md` - register table: `*.xlsx`, `*.csv`, markdown table, IP-XACT XML - RTL in place, an external RTL path, or a generated stub The result must compile, run `<ip>_sanity_test`, run `<ip>_reg_access_test`, and provide two usage surfaces: - DV persona: UVM tests, sequences, agent, monitor, RAL hooks - DE persona: `tb_api::write/read/expect_reg` task-style BFM ## Scope | Dimension | Built-in (high-quality scaffold) | Generic fallback | Planned | |---|---|---|---| | Bus | APB slave, AHB-Lite (slave or master), AXI4-Lite (slave or master) | any single-channel request/response bus the scaffold sub-agent can infer from spec + the three built-in exemplars (e.g. I2C, SPI, Wishbone, OBI, custom register buses) | AXI4 full | | Simulator | VCS, Questa (vlog/vsim — static-only, see note), xrun (Cadence Xcelium) | VCS, Questa, xrun | — | | Ref model | none, SV, C-DPI | none, SV, C-DPI | Python-DPI | | Spec input | docx, pdf, md | docx, pdf, md | — |
Details
- Skill name
gen-tb- Repository
- gokeshenzhen/gen-tb-skill
- License
- Apache-2.0
- Repo updated
- 14 July 2026
FAQ
What does the Gen Tb skill do?
Generate a complete UVM testbench scaffold for a single IP from its spec documents (docx/pdf/md) and register table (xlsx/csv/md/IP-XACT). Use whenever the user asks to "generate a UVM tb", "build a verification environment", "scaffold a testbench", "create a UVC", "set up DV for this IP", or anything equivalent in Chinese ("帮我生成验证环境", "搭一个 tb", "做 UVM 环境", "做这个 IP 的验证"). Also trigger when the user points at a directory containing an IP spec and asks Claude to "verify it" / "test it" without naming UVM explicitly. Produces a runnable UVM tb (APB / AHB-Lite / AXI4-Lite as first-class buses; oth
How do I install the Gen Tb skill?
skills CLI (Claude Code, Cursor, Codex and more): npx skills add gokeshenzhen/gen-tb-skill --skill gen-tb. Skills go in ~/.claude/skills (personal) or .claude/skills (project), and Claude loads them automatically when a task matches the description.
Is Gen Tb popular?
It lives in gokeshenzhen/gen-tb-skill, which has 27 GitHub stars and 9 forks.
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